Paging from Memory Management

One possible solution to the external fragmentation problem is to permit logical address space of a process to be noncontiguous. This allows to allocate physical memory to a processes wherever it is available.

One way of implementing this solution is through the user of a paging scheme.

The fragmentation problem with main memory are also common with backing store. Paging avoids the considerable problem of fitting the varying-resized memory portion onto the backing store.

When some code fragments or data residing in main memory to be swapped out, space must be found on the backing store.

Because of its advantages over the previous methods, paging in various form is commonly used in many operating system.

Basic Method

Physical memory is broken into fixed-sized broken called “frames” logical memory is also broken into blocks of the same size called “pages”.

When a process is to be executed its pages are loaded into any available memory frames from the backing store. The backing store is divide into fixed-sized blocks that are of same size as the memory frames.

Hardware support for paging fig

Every address generated by the CPU is divided into two parts:

A page number (p) and a page offset (d)

The page number is used as index into a page table.

The page table contains the base address of each page in physical memory. This base address is combined with the page offset to define the physical memory address. This physical address is sent to memory unit.

The paging model of memory: 

 The page size (like the frame size) is defined by the hardware. The size of a page is typically a power of 2 varying 512 bytes and 8192 bytes per page, depending on the computer architecture.

If the size of logical addresses space is 2^m  and a page size is 2n addressing units (bytes or words), then the high-order-m-n bits of a logical address designate the page number, and the n low-order bits designate the page offset.